Intel Xeon 6748P 48c/96t 2.5GHz-4.1GHz 300W (PK8072006347800)

Intel Xeon 6748P — 48-core Granite Rapids for dense enterprise and cloud workloads

The Intel Xeon 6748P belongs to the Xeon 6 family (Granite Rapids) and is aimed at data centers that need a balance of high core density, strong single-thread performance and very high memory bandwidth. Built on the Intel 3 process, it offers 48 cores and 96 threads with a 2.5 GHz base frequency and up to 4.1 GHz max turbo, plus an all-core turbo around 3.8 GHz. This combination makes the 6748P suitable both for heavily threaded scale-out services and for latency-sensitive control-plane or database workloads that still depend on fast per-core performance.

A defining feature of this SKU is its 192 MB of shared L3 cache coupled with a 300 W TDP envelope. The large cache reduces pressure on main memory in mixed or noisy-neighbor environments, where multiple services share the same socket and exhibit irregular access patterns. It also helps stabilize performance for in-memory databases, columnar analytics engines and key-value stores, which often suffer when cache capacity is insufficient. The 300 W TDP reflects that this is a high-end part designed to run under sustained load in properly cooled 1U/2U servers, not a low-power edge chip.

Memory bandwidth and capacity are central to the positioning of the 6748P. The processor supports eight channels of DDR5 at up to 6400 MT/s and can address up to 4 TB of RAM per socket, depending on platform configuration. For operators running large in-memory OLTP/OLAP databases, distributed caches, real-time risk engines or large-scale analytics, this allows far larger working sets to stay in memory and benefits algorithms that are more bandwidth-bound than compute-bound. Compared with earlier DDR4-based generations, the move to high-speed DDR5 significantly improves performance in scan-heavy, vectorized query execution and streaming analytics.

Connectivity is another strength. The Xeon 6748P uses the LGA 4710 socket and exposes a substantial PCIe 5.0 lane budget (on typical platforms up to 88 lanes), which provides ample headroom for multi-GPU configurations, NVMe clusters and high-speed networking. This makes it a good fit for designs that combine CPU-resident services (databases, control plane, orchestration) with GPU-accelerated AI inference or data processing on the same node, without running into I/O bottlenecks. For storage-focused roles, the PCIe 5.0 capability enables dense arrays of NVMe SSDs with enough bandwidth to keep parallel query engines or object stores saturated.

Multi-socket scalability is built into this SKU. The 6748P supports Intel UPI at 24 GT/s with multiple links per socket and is advertised by server vendors as suitable for 4-socket and 8-socket platforms. In practice, that enables several deployment patterns: high-core-count SMP systems for traditional enterprise databases, large shared-memory instances for technical computing, or tightly coupled nodes for virtualized private clouds. In these topologies, the combination of fast UPI, large L3 cache and high memory bandwidth helps minimize cross-socket penalties and keeps NUMA effects manageable, provided the software stack is tuned correctly.

In real deployments, the Xeon 6748P is most interesting where operators want to consolidate multiple medium-sized instances onto fewer, more capable sockets while staying within a conventional power and cooling envelope. Typical use cases include mixed Kubernetes clusters with both CPU-intensive microservices and stateful databases, large VMware or KVM farms with high consolidation ratios, as well as HPC or financial workloads that do not require the very highest core counts but benefit from high cache capacity and memory bandwidth. Compared with lower-tier Xeon 6 SKUs, the 6748P offers more headroom before saturation, making it easier to absorb traffic spikes or batch windows without constantly scaling out horizontally.